In this paper, the first-in-first-out(FIFO) circuit design for the PCI-Express interface is proposed,which is based on the dynamic access memory (DRAM) core with the 0.
18μm标准CMOS工艺实现的基于动态存储器(DRAM)内核的高速大容量先入先出存储器(FIFO)电路及其版图设计。
DRAM is an important memory device,the application of FPGA is quite extensive in the area of hardware design.
动态存储器(DRAM)是重要的存储器件,现场可编程门阵列(FPGA)在计算机硬件设计领域的应用也十分广泛。
Design of dynamic memory in data acquisition of nuclear medicine;
核医学数据获取动态存储器的设计
Based on 60MHz intermediate - frequency signal of weather radar , by using the technology of A/D undersampling , digital- direct synthesizing sampling clock, putting SDRAM as large- scale buffer and 64 bits PCI bus as high- speed transfer ,the paper has r.
本文针对天气雷达60MHz中频信号,通过应用A/D欠采样技术、数字直接合成采样时钟、以动态存储器(SDRAM)为大容量缓存、64位PCI总线为高速传输,实现了中频数据采集和传输;文中详细介绍了这些关键技术的设计。
dynamic storage allocation
动态存储分配;动态存储器分配;动态存储区分配
Extendable-Multi-Heap Solution for Management of Dynamic Storage System;
可扩展多堆动态存储器管理解决方案
Design of Dual Rate Dynamic Memory Based on FPGA
基于FPGA的双倍速率动态存储器设计
Designing of Dynamic Storages by Digital Frequency Synthesis Based on Embed
嵌入式数字频率合成系统动态存储器设计
dynamic paging of memory
存储器动态页面调动
dynamic random access memory
动态随机访问存储器
dynamic tape and memory dump routine
动态磁带与存储器转储程序
dynamic RAM reliability
动态随机存取存储器的可靠性
enhanced dynamic random access memory
增强型动态随机存取存储器
dynamic mos array chip
动态金属—氧化物半导体存储器阵列片
MOS dynamic random access memory
金属-氧化物-半导体动态随机存储器
static random access memory
静态随机存取存储器
dynamic MOS RAM
动态金属氧化物半导体随机存取存储器
The Design of SDRAM Controller
同步动态随机访问存储器控制器的设计
To release internal or external storage space under dynamic storage allocation.
在存储器动态分配情况下，释放内部或外部的存储空间。同blow。
bistable opticelectronic element memory
双稳态光电元件存储器
amorphous semiconductor memory
非晶态半导体存储器
SDRAM Tester Design Based on FPGA
基于FPGA的同步动态随机存储器测试仪的实现
